The RISC-Cluster is a distributed computing cluster built from RISC-V microcontrollers. It consists of a master node (CH32V307RCT6) and many worker (slave) nodes (CH32V003F4P6), all connected via Ethernet on a custom PCB. The master coordinates tasks, the workers perform computation. USB is used for programming/debugging; there are LEDs for status; it’s built with open-hardware (KiCad, etc.). 

• To explore how far microcontrollers can scale as a cluster ‒ for example how many nodes, how much parallelism, and what kind of tasks can be distributed among modest RISC-V cores.
• To enable learning and experimentation with distributed systems, embedded networking, firmware development, etc.

• Perhaps also to provide a nice platform for hobbyists / researchers who want a small, open-hardware RISC-V cluster without relying on more expensive single-board computers.

• All open-hardware: PCB designs (KiCad), firmware, BOM, etc., released under a strong open hardware license (CERN OHL v2). 

• Ethernet connected microcontroller cluster: Most MCU projects are stand-alone; here the worker nodes communicate over Ethernet, with a proper master node & network infrastructure. 
• Scalability on modest hardware: Uses many small, inexpensive CH32V003F4P6 nodes, in a single board, which can make a cluster with many parallel lightweight cores. This gives a good tradeoff of cost, size, power vs parallel compute.
• Hybrid debugging / programming support: USB for debug/programming; programming headers; status LEDs etc make development easier.
• Learning / experimental value: Because it’s open, modular, you can modify the number of nodes, firmware, tasks, etc. Good for people who want to mess around or build their own variants.