The FMC Loopback Module is a passive plug-in adapter for ANSI/VITA 57.1 FPGA Mezzanine Card (FMC) connectors.Designed by I A M Electronic in Germany
Features Passive plug-in module, no configuration required Works at up to 10 Gbit/s with multi-gigabit transceivers 11x LEDs for visual feedback of the applied supply voltages High-Pin Coun...Read More…
Passive plug-in module, no configuration required
Works at up to 10 Gbit/s with multi-gigabit transceivers
11x LEDs for visual feedback of the applied supply voltages
High-Pin Count (HPC) connector according to ANSI/VITA 57.1 FMC
Mates with HPC or LPC carrier boards
All FMC data and clock pins are completely controlled by the FPGA
Optional pin header (2.54 mm pitch) for voltage monitoring
Practical design for the best price-performance ratio
2-layer printed circuit board (PCB)
Reference designs are available
Open source hardware
Easy prototyping and analysis of high-speed data links
Testing and debugging FMC carrier boards
Fast verification of signal integrity on FMC carrier boards
Research and education with FPGAs
The FMC Loopback Module is a passive plug-in adapter for ANSI/VITA 57.1 FPGA Mezzanine Card (FMC) connectors. The loopback board is designed to mate a High-Pin Count (HPC) connector, but also fits without restrictions to Low-Pin Count (LPC) connectors. According to the FMC standard, all signals of an FPGA IO bank (LA, HA and HB bank) are connected by the mezzanine board as loopback. This means that each pin of an IO bank has a fixed endpoint through the FMC loopback card. These signal pairs must be defined as In/Out pairs in the FPGA on the carrier side. Apart from that necessary IO constraints, the FMC Loopback Board does not require any further configuration for its full functionality. An FMC loopback test of an FMC carrier board is essential to identify production faults (e.g. defective solder joints of the FPGA package or FMC connector). In addition to production tests, a loopback test reveals information about the signal integrity on the carrier board (e.g. by eye scans). Finally, the FMC loopback module can be used to implement high-speed data links at an early prototyping stage, where the transmitter and receiver logic is controlled by a single FPGA. Such a performance test can be used to determine latency, throughput or data loss of high-speed serial data links (e.g. JESD204B).
Find more resources at FMCHUB.COM
The full datasheet is available Here.
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